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use super::{InsnOutput, LowerCtx, VCodeInst, ValueRegs};
use crate::ir::Type;
use regalloc::{Reg, Writable};
pub fn ty_bits(ty: Type) -> usize {
usize::from(ty.bits())
}
pub(crate) fn ty_has_int_representation(ty: Type) -> bool {
ty.is_int() || ty.is_bool() || ty.is_ref()
}
pub(crate) fn ty_has_float_or_vec_representation(ty: Type) -> bool {
ty.is_vector() || ty.is_float()
}
pub(crate) fn get_output_reg<I: VCodeInst, C: LowerCtx<I = I>>(
ctx: &mut C,
spec: InsnOutput,
) -> ValueRegs<Writable<Reg>> {
ctx.get_output(spec.insn, spec.output)
}